INSIGHT

Integration of III-V Nanowire Semiconductors for next
Generation High Performance CMOS SOC TECHNOLOGIES

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INSIGHT contributes two papers to IEDM 2017

Published: 2017-12-31

INSIGHT maintains its presence at the important International Electron Device Meeting (IEDM), attended both by the semiconductor industry and the academic leaders in device research. Both Lund University and IBM have each an INSIGHT related contribution to this year’s conference:

The contribution of Lund University is titled "Sub-100-nm Gate-Length Scaling of Vertical InAs/InGaAs Nanowire MOSFETs on Si" by Kilpi et al, where a process to vary the the gate-length of vertical MOSFETs on the same chip is described, as well as demonstrating a device with gm = 2.4 mS/μm and a device with Ion = 407 μA/μm at Ioff = 100 nA/μm and VDD = 0.5 V, which both are record values for vertical MOSFETs. 

The contribution of IBM is titled "A Scaled Replacement Metal Gate InGaAs-on-Insulator n-FinFET on Si with Record Performance" by Hahn et al, and demonstrates a demonstrate  a  scaled  replacement-metal-gate InGaAs-on-Insulator  n-FinFET  on  Si  with LG = 13 nm  and record ION of 249 μA/μm at fixed IOFF = 100 nA/μm and VD = 0.5 V.



 


INSIGHT contributes to the VLSI Symposia 2017

Published: 2017-06-13

INSIGHT contributes two papers to VLSI this year

Both Lund University and IBM + LETI have an INSIGHT related contribution to the prestigous VLSI Symposia, this year taking place in Kyoto, Japan. This is a testament to the high level of research the partners are doing in the project.

The contribution of Lund University is titled "Vertical Heterojunction InAs/InGaAs Nanowire MOSFETs on Si with Ion = 330 µA/µm at Ioff = 100 nA/µm and VD = 0.5 V" by Kilpi et al, where improved on-currents are demonstrated in vertical nanowire MOSFETs with a modified drain heterostructure. 

The contribution of IBM and LETI is titled "First Demonstration of 3D SRAM Through 3D Monolithic Integration of InGaAs n-FinFETs on FDSOI Si CMOS with Inter-layer Contacts" by Deshpande et al, and demonstrates a hybrid 3D SRAM cells using InGaAs nFETs and SiGe pFETs co-integrated in a 3D stack.



 


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